NSF Grants Zhuo Feng $600K to Improve Integrated Circuit Simulations
Electrical and computer engineering professor aims to simplify monitoring, improvement of computer chips
Zhuo Feng, professor in the Department of Electrical and Computer Engineering at Stevens Institute of Technology, is on a quest to make it easier to model, design and verify complex computer chips. With a three-year, $599,998 grant from the National Science Foundation, Feng is working to simplify these circuit networks so they are better positioned to support today’s design automation tasks.
Transforming technology, starting with design
Computers have made countless revolutionary advances since the first small electronic switches known as transistors began paving the way for modern microchips more than 65 years ago.
Just one of today's computer chips can contain billions of switches that allow computers to process data. As this technology continues to evolve, designers need to exploit circuit simulators to predict how the circuits will behave in real life. This circuit simulation step is critical in the chip design process to ensure its reliability, performance and cost-effectiveness, while reducing the risks of costly errors and production delays.
However, simulating a large circuit block can take days or even weeks, while optimizing and verifying the entire chip can require hundreds or thousands of these simulations. It’s an unwieldy process that can hinder progress in an area that has so much potential to produce continued game-changing transformations in a variety of fields.
First, Feng and two Ph.D. student researchers will investigate a novel algorithmic framework called inGRASS that helps simplify large, complex networks. They will work with leading experts in circuit simulation at Dutch electronics manufacturer NXP Semiconductor to evaluate the research using realistic circuit designs and comparing the performance against state-of-the-art commercial software and NXP Semiconductor's in-house computer-aided design tools. The resulting approach is intended to help manage changes in the circuit, such as adding or removing connections, much more quickly.
This project builds on research Feng has already been conducting with algorithms intended to break down and streamline complicated networks.
“My research is grounded in a rigorous mathematical foundation, setting it apart from previous approaches that have primarily relied on trial and error,” Feng explained. “The biggest challenge will be dealing with extremely large-scale circuit networks with tens of billions of elements. But the foundation we are looking to build will help ensure higher-quality solutions to complex chip modeling and simulation problems, and allow designers to simulate chip designs with significantly less time and effort.”
Simplifying simulations for even more powerful applications
Feng envisions his research helping to significantly advance the development of integrated circuits that can efficiently handle increasingly large-scale and complex systems.
“When I first learned about circuit networks in high school, I became super excited about this technology,” he said. “As an undergraduate, I became interested in circuit design and analysis, which motivated me to dive deeper into the computer-aided design of integrated circuits. I believe the results of the research we’ll be conducting through this National Science Foundation grant could contribute to the advancement of scalable methods for solving partial differential equations and improved network partitioning for managing complexity and optimizing performance.”
Feng’s work is an innovative academic exercise with very practical applications.
“This increasingly important area can potentially benefit many other research fields,” said Feng. “I’m looking forward to engaging in more collaborations and exploiting emerging applications related to scientific computation and machine learning to help ensure that these tiny circuits continue to help make a big difference in our world.”